The present invention relates to a phase comparator and, more particularly, to a phase comparator included in a phase locked loop (PLL) for comparing two input signals with respect to phase to produce their phase difference.
As well known in the art, a PLL includes a voltage controlled oscillator (VCO), a loop filter and a phase comparator which are interconnected in a loop. A modulated signal and a signal outputted by the VCO are applied to the phase comparator. Comparing the two input signals with respect to phase, the phase comparator determines their phase difference and feeds back the phase difference to the VCO via the loop filter. The PLL therefore serves to cause the phase of the VCO output to follow the phase of the modulated signal, and the phase comparator is an important element which dictates the characteristic of the PLL. When the phase comparator is implemented by a multiplier or a balanced mixer having a multiplying characteristic, the phase comparison characteristic is a sinusoidal characteristic as defined by the phase difference and the amplitude of a phase error signal which are represented by the abscissa and the ordinate, respectively. The amplitude of a phase error signal varies in conformity to the degree of phase difference so long as the phase difference lies in a monotonous increase range. promoting rapid acquisition. However, while the phase difference lies in a monotonous decrease range, the amplitude of a phase error signal decreases with the increase in phase difference with the result that a substantial period of time is needed for acquisition.
Various implementations have heretofore been proposed to eliminate the shortcoming discussed above. Among them, a phase comparator disclosed in Japanese Laid-Open Patent Publication (Kokai) No. 60-183,862 (corresponding to European Patent Publication No. 0,154,503) includes a conversion table which is constituted by a read-only memory (ROM). The conversion table or ROM table stores phase data in the form of digital signals which correspond to the combinations of amplitudes of a pair of digital signals that have a quadrature relation to each other. More specifically, the ROM serves as a polar coordinates conversion table in which the phase data are stored and are accessed by address data to produce the phase data. While a phase comparator of the type using a ROM which is accessed by a pair of digital signals as stated above may be successful in eliminating the drawback concerned, it is incapable of attaining a desired resolution unless the ROM has a large capacity. Although the recent semiconductor integrated circuit technology has accelerated the increase in the capacity of a storage, a large capacity storage is still expensive at the present stage of development. Moreover, a ROM having a desired capacity is not always easy to obtain. Should a ROM having a desired capacity be implemented as a plurality of ROMs which are comparatively easy to obtain, the ROMs would scale up the circuitry and thereby obstruct the miniaturization of a phase comparator.